yosys
https://github.com/cliffordwolf/yosys
C++
Yosys Open SYnthesis Suite
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- Issues
- Suggestions to Improve debug/visualisation in SMT2 backend for SBY
- Properly specify and reimplement opt_clean/clean
- clean: remove unused wires even with (* init *) on
- Produced edif gives Multiple Driver Nets error.
- pyosys API: Silent aborts (segfault/assert())
- iCE40 DSP inference: Inferred multiply-add not working if parentheses omitted
- opt_expr prevents driver/constant conflict warning
- Speed opt. Compared std 11, 14, 17, 2a.
- Poor error message with two always blocks named the same
- Selecting one of several cell types in dfflibmap based on timing/area tradeoffs
- Docs
- C++ not yet supported