yosys
https://github.com/cliffordwolf/yosys
C++
Yosys Open SYnthesis Suite
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- Issues
- `synth_xilinx` DSP packing asserts (crashes) on a non-zero-init input register
- gowin: infer DSP multiply-accumulate for the GW5A family
- README: cmake build and test instructions
- gowin: infer DSP multipliers for the GW5A family
- Regarding handling blackboxes with parameters
- Assertion in hierarchy when elaborating parameterized generate instances due to non-unique name
- Propagate src attributes in opt_share
- Performance issue for read_verilog of nested for-loops with intermediate wire declaration
- Fix meminit enable for initialized memories
- Wildcard package imports (`import pkg::*`) fail to resolve typedefs
- Docs
- C++ not yet supported