yosys
https://github.com/cliffordwolf/yosys
C++
Yosys Open SYnthesis Suite
Triage Issues!
When you volunteer to triage issues, you'll receive an email each day with a link to an open issue that needs help in this project. You'll also receive instructions on how to triage issues.
Triage Docs!
Receive a documented method or class from your favorite GitHub repos in your inbox every day. If you're really pro, receive undocumented methods or classes and supercharge your commit history.
C++ not yet supported3 Subscribers
Add a CodeTriage badge to yosys
Help out
- Issues
- Fix meminit enable for initialized memories
- techmap: incorrect lowering of unsigned $mod via $__div_mod_u produces wrong simulation result
- Wildcard package imports (`import pkg::*`) fail to resolve typedefs
- wreduce incorrectly narrows cells whose high bits are observable through concatenation bit-select
- Add register absorption for MULT* for Nexus (fix #5917).
- setundef: strip init attributes from undriven wires (fixes #5835)
- Empty `always @*` constant assignment changes RTL/netlist behavior through inversion
- Follow up to #5906 Nexus DSP techmap is missing MULT* register absorption
- RTLIL::Patch attribute transfer and more
- [WIP] Rapidflex xt plugin
- Docs
- C++ not yet supported