vllm
https://github.com/vllm-project/vllm
Python
A high-throughput and memory-efficient inference and serving engine for LLMs
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Help out
- Issues
- [RFC]: Race-free port management: pick ports at bind time, publish over an existing channel
- [Build][gRPC] Publish protobuf schemas to Buf
- [ROCm][CI] Solidify entrypoint LLM lifecycle
- [Model] Extend device-side mm normalization to Qwen3VL/Qwen3.5
- [ROCm][Bugfix] Restore AITER-compatible Triton 3.7 pin
- [Core] Disable fuse_allreduce_rms under VLLM_BATCH_INVARIANT (non-deterministic under TP)
- [LoRA] Add fixed-weight routed LoRA reference path
- [KVConnector][MoRI-IO] Honor VLLM_MORIIO_DEFERRED_TIMEOUT_S with observability and tests
- [Bugfix] Fix structured outputs on the V2 CPU model runner
- [CI/Build][BugFix][The Rock] Apply upstream torchao fix for python 3.14 compatibility to torchao
- Docs
- Python not yet supported