yosys
https://github.com/cliffordwolf/yosys
C++
Yosys Open SYnthesis Suite
Triage Issues!
When you volunteer to triage issues, you'll receive an email each day with a link to an open issue that needs help in this project. You'll also receive instructions on how to triage issues.
Triage Docs!
Receive a documented method or class from your favorite GitHub repos in your inbox every day. If you're really pro, receive undocumented methods or classes and supercharge your commit history.
C++ not yet supported3 Subscribers
Add a CodeTriage badge to yosys
Help out
- Issues
- [abc] Assertion fails in abc_ops_reintegrate.cc
- [abc] command yosys-abc -s -f abc.script 2>&1 returns -2
- Verilog attribute documentation should be scoped to user-facing verilog features
- Support reals used as a condition
- Support reals in constant functions
- synth_xilinx DSP register absorption corrupts a signed product output
- read_verilog -sv: unary -/~/! before a size cast binds to the cast width; with a constant operand the operator is silently dropped
- Infer MULTADDSUB36X36 and 4-lane dot plus addend on Nexus [sc-933]
- Segmentation fault on synth_gatemate
- Follow up to #5906 Nexus DSP - infer two more MAC shapes
- Docs
- C++ not yet supported